1. Field of the Invention
The present invention relates to a timing recovery circuit, and more particularly, to a Newton's method-based timing recovery circuit.
2. Description of the Prior Art
In a wireless communications system, wireless signals received by a receiver have to enter into a synchronization process first and then travel to a demodulator to be demodulated accurately. A timing recovery circuit is designed to execute the synchronization process.
Please refer to FIG. 1, which is a function block diagram of a timing recovery circuit 10 according to the prior art. The timing recovery circuit 10 comprises a sampling clock generator 12, a sampler 14, an interpolator 16, and a data filter 18.
The sampling clock generator 12 generates a sampling clock TS having a period TS; The sampler 14 samples a wireless signal X(t) according to the sampling clock TS and generates a sampling signal X(mTS); The interpolator 16 interpolates the sampling signal X(mTS) with an interpolation interval Ti and generates an interpolation signal Y(kTi); The data filter 18 filters away noises in the interpolation signal Y(kTi) and outputs an interpolation signal Yf(kTi) to a demodulator electrically connected to the timing recovery circuit 10 to be demodulated.
In order that the demodulator can demodulate the interpolation signal Yf(kTi) output from the data filter 18 accurately, the timing recovery circuit 10 has to further comprise a timing error detector 20, and a timing error controller 22 electrically connected between the timing error detector 20 and the interpolator 16.
The timing error detector 20 detects any timing errors in the interpolation signal Yf(kTi) and generates a timing error signal e; The timing error controller 22 generates a timing_offset signal μ to control the operation of the interpolator 16 according to the timing error signal e, so as to reduce the timing errors in the interpolation signal Yf(kTi) ready to be generated by the data filter 18. Therefore, the demodulator can demodulate the interpolation signal Yf(kTi) more accurately.
Since the amplitude of the timing errors in the interpolation signal Yf(kTi) input to the demodulator by the timing recovery circuit 10 has a close relation with the accuracy of the demodulation process preformed by the demodulator on the interpolation signal Yf(kTi), i.e. a small interpolation signal Yf(kTi) corresponding to an accurate demodulation process performed by the demodulator on the interpolation signal Yf(kTi), designers to design the timing recovery circuit 10 have made a great effort and try to design a timing recovery circuit, on a basis of a variety of Mathematics and Physics methods, good enough to calculate the timing_offset signal μ more accurately, and to reduce the timing errors in the interpolation signal Yf(kTi) as small as possible.